CPUlator Computer System Simulator

CPUlator is a full-system Nios II, ARMv7, RISC-V RV32, and SPIM-compatible MIPS simulator that runs in a web browser. It is designed for education use to teach computer organization and assembly-language programming. The computer simulation includes I/O devices and interrupt support.

En bref

Ajouté le

17 mars 2026

Matière et domaine

computer-science-advanced · computer-architecture-organization

Niveaux scolaires

9e année (3e)–12e année (Terminale)

Type de page

Tool

Introduction

CPUlator Computer System Simulator Overview

  • Purpose: A web-based simulator and debugger for computer systems (processor and I/O devices) designed for teaching assembly-language programming and computer organization.
  • Supported Architectures: Nios II, ARMv7, MIPS32 (r5 and r6), and RISC-V (RV32IMAFD+).
  • Key Features:
    • Runs directly in modern web browsers (no installation required).
    • Unified debugging and UI infrastructure across all supported instruction sets.
    • Includes features like breakpoints, single-stepping, reverse stepping, call stack visualization, and runtime calling convention checks.
    • Supports a 4 GB flat memory model with up to 2048 MB of usable memory.
  • Development History:
    • January 2016: Initial release (Nios II) at the University of Toronto.
    • Fall 2016: ARMv7 support added.
    • January 2018: MIPS32r6 support added.
    • November 2018: MIPS32r5 support added.
    • March 2024: RISC-V RV32 support added.
  • Performance: Offers simulation speeds of approximately 20 million instructions per second (Minst/second), outperforming common alternatives like MARS, RARS, QtSPIM, and ARMSim#.

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